

Digilent
Arty Z7
Zynq-7000 SoC Development Board
ZYNQ Processor
650MHz dual-core Cortex-A9 processor
DDR3 memory controller with 8 DMA channels and 4 High Performance AXI3 Slave ports
High-bandwidth peripheral controllers: 1G Ethernet, USB 2.0, SDIO
Low-bandwidth peripheral controller: SPI, UART, CAN, I2C
Programmable from JTAG, Quad-SPI flash, and microSD card (Micro B USB cable NOT included).
Programmable logic equivalent to Artix-7 FPGA
Memory
512MB DDR3 with 16-bit bus @ 1050Mbps
16MB Quad-SPI Flash with factory programmed 48-bit globally unique EUI-48/64™ compatible identifier
Due to supply chain constraints, the SPI Flash has been replaced by the Winbond W25Q128JV starting with revision D.0. This part is not functionally equivalent to parts used on older revisions, but flash programming through Vivado and the QSPI boot mode are not affected. More information can be found in the "Product Change Notice - Flash Memory" document, which can be found in the Arty Z7 Resource Center, available through the Support tab.
microSD slot
Power
Powered from USB or any 7V-15V external power source
USB and Ethernet
Gigabit Ethernet PHY
Due to obsolescence, the Realtek RTL8211E has been replaced by the Realtek RTL8211F starting with revision D.0. These parts are not functionally equivalent, but the capabilities of the Ethernet port are not affected. More information can be found in the "Product Change Notice - Ethernet PHY" document, which can be found in the Arty Z7 Resource Center, available through the Support tab.
USB-JTAG Programming circuitry
USB-UART bridge
USB OTG PHY (supports host only)
Audio and Video
HDMI sink port (input)
HDMI source port (output)
PWM driven mono audio output with 3.5mm jack
Switches, Push-buttons, and LEDs
4 push-buttons
2 slide switches
4 LEDs
2 RGB LEDs
Expansion Connectors
Two standard Pmod ports
16 Total FPGA I/O
Arduino/chipKIT Shield connector
Up to 49 FPGA Digital I/O for the Z7-20 and 26 FPGA Digital I/O for the Z7-10
6 Single-ended 0-3.3V Analog inputs to XADC
4 Differential 0-1.0V Analog inputs to XADC